[SRC 설계] Data Path 검증 및 시뮬레이션
3. 검증
3.1 Data Path 검증
3.1.1 la Instruction ( la r1, 1 )
Step | Concrete RTN | Control Sequence |
T0 | MA ← PC : C ← PC + 4; | PCout, MAin, INC4, Cin |
T1 | MD ← M[MA] : PC ← C; | Cout, PCin, MDrd, Strobe |
T2 | IR ← MD; | MDout, IRin |
T3 | A ← ((rb=0) → 0: (rb≠0) → R[rb]); | Grb, BAout, Ain |
T4 | C ← A + c2<16..0>{sign-extened}; | c2out, ADD, Cin |
T5 | R[ra] ← C; | Cout, Gra, Rin, END |
3.1.2 add Instruction ( add r2, r1, r1 )
Step | Concrete RTN | Control Sequence |
T0 | MA ← PC : C ← PC + 4; | PCout, MAin, INC4, Cin |
T1 | MD ← M[MA] : PC ← C; | Cout, PCin, MDrd, Strobe |
T2 | IR ← MD; | MDout, IRin |
T3 | A ← R[rb]; | Grb, Rout, Ain |
T4 | C ← A + R[rc]; | Grc, Rout, ADD, Cin |
T5 | R[ra] ← C; | Cout, Gra, Rin, END |
3.1.3 shl Instruction ( shl r3, r2, 2 )
Step | Concrete RTN | Control Sequence |
T0 | MA ← PC : C ← PC + 4; | PCout, MAin, INC4, Cin |
T1 | MD ← M[MA] : PC ← C; | Cout, PCin, MDrd, Strobe |
T2 | IR ← MD; | MDout, IRin |
T3 | n ← IR<4..0>; | c1out, Ld |
T4 | n=0 → (n ← R[rc]<4..0>); | NEQZ=1 → (Grc, Rout, Ld) |
T5 | C ← R[rb]; | Grb, Rout, CEQB, Cin |
T6 | shl(:=n≠0 → (C<31..0> ← C<30..0>#0: n ← n-1; shl)); | NEQZ≠1 → (Cout, SHL, Cin, Decr, Goto6) |
T7 | R[ra] ← C; | Cout, Gra, Rin, End |
3.1.4 brnz Instruction ( brnz r3, r1 )
Step | Concrete RTN | Control Sequence |
T0 | MA ← PC : C ← PC + 4; | PCout, MAin, INC4, Cin |
T1 | MD ← M[MA] : PC ← C; | Cout, PCin, MDrd, Strobe |
T2 | IR ← MD; | MDout, IRin |
T3 | CON ← cond(R[rc]); | Grc, Rout, CONin |
T4 | CON → PC ← R[rb]; | Grb, Rout, CON=1 → PCin, END |